Invention Grant
- Patent Title: Mitigation of negative delay via half CP shift
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Application No.: US16430757Application Date: 2019-06-04
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Publication No.: US10856177B2Publication Date: 2020-12-01
- Inventor: Ajay Sharma , Somasekhar Pemmasani
- Applicant: Parallel Wireless, Inc.
- Applicant Address: US NH Nashua
- Assignee: Parallel Wireless, Inc.
- Current Assignee: Parallel Wireless, Inc.
- Current Assignee Address: US NH Nashua
- Agent Michael Y. Saji; David W. Rouille
- Main IPC: H04W28/04
- IPC: H04W28/04 ; H04L27/26 ; H04L5/00 ; H04L25/02

Abstract:
A receiver performing a half cyclic prefix (CP) shift on received subframes is disclosed, comprising: an analog to digital conversion (ADC) module; a cyclic prefix (CP) removal module coupled to the ADC module configured to retain a portion of cyclic prefix samples; a fast Fourier transform (FFT) module configured to receive samples from the cyclic prefix removal module, and to perform a FFT procedure on the received samples using a FFT window, the FFT window being shifted ahead based on the retained portion of cyclic prefix samples, to output an orthogonal frequency division multiplexed (OFDM) symbol; and a rotation compensation module coupled to the FFT module, the rotation compensation module configured to perform phase de-rotation of the OFDM symbol.
Public/Granted literature
- US20190342792A1 Mitigation of Negative Delay via Half CP Shift Public/Granted day:2019-11-07
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