Invention Grant
- Patent Title: Signal processing circuit capable of avoiding cooperating memory chip from performance degradation
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Application No.: US16740950Application Date: 2020-01-13
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Publication No.: US10856404B2Publication Date: 2020-12-01
- Inventor: Shou-Te Yen , Chao-Min Lai , Ping-Chia Wang
- Applicant: REALTEK SEMICONDUCTOR CORP.
- Applicant Address: TW Hsinchu
- Assignee: REALTEK SEMICONDUCTOR CORP.
- Current Assignee: REALTEK SEMICONDUCTOR CORP.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: TW108103906A 20190131
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/18 ; H05K5/00 ; G11C5/04 ; G11C5/06 ; H05K1/02

Abstract:
A signal processing circuit includes: a printed circuit board (PCB) including a first surface layer, a second surface layer, a first reference layer, and a second reference layer, wherein the first and second surface layers are positioned on opposing side of the PCB while the first reference layer and the second reference layer are positioned between the first and second surface layers; a memory chip positioned on the first surface layer; a controller chip positioned on the second surface layer; a first set of signal lines arranged on the first surface layer and coupled with the memory chip, wherein all signal lines in the first set of signal lines does not cross each other; and a second set of signal lines arranged on the second surface layer and coupled with the controller chip, wherein all signal lines in the second set of signal lines does not cross each other.
Public/Granted literature
- US20200253038A1 SIGNAL PROCESSING CIRCUIT CAPABLE OF AVOIDING COOPERATING MEMORY CHIP FROM PERFORMANCE DEGRADATION Public/Granted day:2020-08-06
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