Memory apparatus and methods with heterogeneous memory array architecture
Abstract:
The present invention relates to memory apparatuses and an operating methods using a heterogeneous memory array. An operation method of a memory apparatus using a heterogeneous memory array according to an embodiment of the present invention includes dividing an input bit into at least one data bit according to a mode bit, and writing the divided data bits in each cell of the memory array by using a cell level of the memory array which is configured according to the mode bit.
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