Hardware node having a mixed-signal matrix vector unit
Abstract:
Processors and methods for neural network processing are provided. A method in a processor including a matrix vector unit is provided. The method includes receiving vector data and actuation vector data corresponding to at least one layer of a neural network model for processing using the matrix vector unit, where each of digital values corresponding to the vector data and the actuation vector data is represented in a sign magnitude format. The method further includes converting each of the digital values corresponding to at least one of the vector data or the actuation vector data to corresponding analog values and multiplying the vector data and the actuation vector data in an analog domain and providing corresponding multiplication results in a digital domain.
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