A semiconductor storage apparatus includes: a memory cell array provided with memory cells; a word line connected to each gate of the memory cells; bit lines connected respectively to ends of the memory cells; and a control circuit. The control circuit controls a word line driver and a sense amplifier circuit to perform a first programming pass for programming data of states each of which has a first threshold distribution width to the memory cells and a second programming pass for programming data of the states each of which has a second threshold distribution width narrower than the first threshold distribution width to the memory cells, the second programming pass being performed after the first programming pass, and the first programming pass includes at least one first verify operation and one or more additional program operations.