Invention Grant
- Patent Title: Method for manufacturing semiconductor device and semiconductor memory device
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Application No.: US16118318Application Date: 2018-08-30
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Publication No.: US10861707B2Publication Date: 2020-12-08
- Inventor: Shinichi Furukawa
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz & Volek PC
- Priority: JP2018-042021 20180308
- Main IPC: H01L27/11519
- IPC: H01L27/11519 ; H01L21/311 ; H01L27/11556 ; H01L27/11524 ; H01L21/02

Abstract:
A method for manufacturing a semiconductor device includes forming a sacrificial member on a foundation layer, the sacrificial member extending in a first direction along a front surface of the foundation layer; forming a line and space pattern including a plurality of structures on the foundation layer and the sacrificial member, the structures extending along the front surface of the foundation layer in a second direction crossing the first direction; and forming communication passages between the foundation layer and the structures by selectively removing the sacrificial member via spaces between the structures, the spaces being in communication with each other through the communication passages.
Public/Granted literature
- US20190279878A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2019-09-12
Information query
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