Invention Grant
- Patent Title: Method of evaluating impurity gettering capability of epitaxial silicon wafer and epitaxial silicon wafer
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Application No.: US16488758Application Date: 2018-01-12
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Publication No.: US10861709B2Publication Date: 2020-12-08
- Inventor: Satoshi Shigematsu , Ryosuke Okuyama , Kazunari Kurita
- Applicant: SUMCO CORPORATION
- Applicant Address: JP Tokyo
- Assignee: SUMCO CORPORATION
- Current Assignee: SUMCO CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2017-037606 20170228; JP2017-153209 20170808
- International Application: PCT/JP2018/001471 WO 20180112
- International Announcement: WO2018/159140 WO 20180907
- Main IPC: H01L21/322
- IPC: H01L21/322 ; H01L21/265
Abstract:
Provided is a method of evaluating the impurity gettering capability of an epitaxial silicon wafer, which allows for very precise evaluation of the impurity gettering behavior of a modified layer formed immediately under an epitaxial layer, the modified layer containing carbon in solid solution. In this method, a modified layer located immediately under an epitaxial layer, the modified layer containing carbon in solid solution, is analyzed by three-dimensional atom probe microscopy, and the impurity gettering capability of the modified layer is evaluated based on a three-dimensional map of carbon in the modified layer, obtained by the analysis.
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