Invention Grant
- Patent Title: Semiconductor device having a multilayer structure
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Application No.: US16446078Application Date: 2019-06-19
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Publication No.: US10861786B2Publication Date: 2020-12-08
- Inventor: Yoshikazu Nagamura , Takashi Ipposhi , Katsumi Eikyu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2018-123267 20180628
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L21/3213 ; H01L23/532

Abstract:
The semiconductor device has a wiring M 2, an interlayer insulating film IL3 formed on the wiring M 2, and two wirings M 3 formed on the interlayer insulating film IL3, and the wiring M 3 is connected to the wiring M 2 by a conductor layer PG2 formed in the interlayer insulating film IL3. A recess CC3 is formed on the upper surface IL3a of the interlayer insulating film IL3, and the recess CC3 is defined by a side surface S 31 connected to the upper surface IL3a and a side surface S 32 connected to the side surface S 31, and the side surface S 32 is inclined so that the width WC3 of the recess CC3 decreases in the direction from the upper surface IL3a of the interlayer insulating film IL3 toward the upper surface IL2a of the interlayer insulating film IL2.
Public/Granted literature
- US20200006222A1 SEMICONDUCTOR DEVICE Public/Granted day:2020-01-02
Information query
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