Invention Grant
- Patent Title: Fin end plug structures for advanced integrated circuit structure fabrication
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Application No.: US16906680Application Date: 2020-06-19
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Publication No.: US10861850B2Publication Date: 2020-12-08
- Inventor: Byron Ho , Chun-Kuo Huang , Erica Thompson , Jeanne Luce , Michael L. Hattendorf , Christopher P. Auth , Ebony L. Mays
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/8234 ; H01L27/088 ; H01L29/66 ; H01L29/06 ; H01L29/78 ; H01L21/8238 ; H01L27/092

Abstract:
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first isolation structure over a first end of a fin. A gate structure is over the fin and is spaced apart from the first isolation structure along the direction. A second isolation structure is over a second end of the fin, the second end opposite the first end. The second isolation structure is spaced apart from the gate structure. The first isolation structure and the second isolation structure both comprise a first dielectric material laterally surrounding a recessed second dielectric material distinct from the first dielectric material. The recessed second dielectric material laterally surrounds at least a portion of a third dielectric material different from the first and second dielectric materials.
Public/Granted literature
- US20200321333A1 FIN END PLUG STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION Public/Granted day:2020-10-08
Information query
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