Invention Grant
- Patent Title: Resistive memory device having a template layer
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Application No.: US16398253Application Date: 2019-04-29
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Publication No.: US10862028B2Publication Date: 2020-12-08
- Inventor: Seshubabu Desu
- Applicant: 4DS Memory, Limited
- Applicant Address: AU West Perth
- Assignee: 4DS MEMORY, LIMITED
- Current Assignee: 4DS MEMORY, LIMITED
- Current Assignee Address: AU West Perth
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; H01L45/00 ; G11C13/00

Abstract:
A memory device including a template layer is disclosed. The memory device also includes a memory layer connected to the template layer, where the memory layer has a variable resistance, and where the crystalline structure of the memory layer matches the crystalline structure of the template layer. The memory device also includes a conductive top electrode on the memory layer, where the top electrode and the memory layer cooperatively form a heterojunction memory structure.
Public/Granted literature
- US20190326512A1 RESISTIVE MEMORY DEVICE HAVING A TEMPLATE LAYER Public/Granted day:2019-10-24
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