Invention Grant
- Patent Title: Low power cycle to cycle bit transfer in gate drivers
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Application No.: US16257871Application Date: 2019-01-25
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Publication No.: US10862483B2Publication Date: 2020-12-08
- Inventor: Amedeo Paganini , Massimo Grasso , Sergio Morini , Davide Respigo
- Applicant: Infineon Technologies Austria AG
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Agency: Design IP
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/003 ; H03K19/0185

Abstract:
A gate driver includes a high-side region that operates in a first voltage domain, a low-side region that operations in a second voltage domain lower than the first voltage domain, a termination region interposed between the high-side region and the low-side region and configured to isolate the first voltage domain from the second voltage domain, a high-side gate driver disposed in the high-side region and configured to drive a high-side power transistor, a low-side gate driver disposed in the low-side region and configured to drive a low-side power transistor, and a plurality of termination diodes disposed in the termination region and configured to transmit information bits between the high-side region and the low-side region, where each of the plurality of termination diodes includes an anode coupled to the low-side region and a cathode coupled to the high-side region.
Public/Granted literature
- US20200244265A1 LOW POWER CYCLE TO CYCLE BIT TRANSFER IN GATE DRIVERS Public/Granted day:2020-07-30
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