Invention Grant
- Patent Title: FD-SOI device calibration circuit and method therefor
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Application No.: US16438477Application Date: 2019-06-12
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Publication No.: US10862490B2Publication Date: 2020-12-08
- Inventor: Xiaolei Wu , Yin Guo , Haitian Zhou
- Applicant: NXP USA, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Priority: CN201810874429 20180802
- Main IPC: H03L7/099
- IPC: H03L7/099 ; H03K3/03 ; H03K3/011 ; H03L7/08

Abstract:
A calibration circuit for body biasing includes a phase detector, first and second voltage generators, and first and second voltage regulators. The phase detector has an input terminal configured to receive an oscillation signal from a ring oscillator. The phase detector provides output signals indicative of phase differences between the oscillation signal and a reference signal. The first voltage generator provides a first reference voltage using the output signals from the phase detector, and the first voltage regulator provides a first biasing voltage using the first reference voltage. The second voltage generator provides a second reference voltage using the first reference voltage, and the second voltage regulator provides a second biasing voltage using the second reference voltage. The first biasing voltage is used to bias P-wells of transistors in the ring oscillator, and the second biasing voltage is used to bias N-wells of transistors in the ring oscillator.
Public/Granted literature
- US20200044627A1 FD-SOI DEVICE CALIBRATION CIRCUIT AND METHOD THEREFOR Public/Granted day:2020-02-06
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