In a device including a processor and a memory in communication with the processor, the memory includes executable instructions that, when executed by the processor, cause the processor to control the device to perform functions of receiving, from a first network assigned to a first tier level, a request for tier level switch from the first tier level to a second tier level; determining that a second network assigned to the second tier level is capable of switching from the second tier level to another tier level; assigning, to the second network, a channel of the first tier level; and assigning, to the first network, a channel of the second tier level.