Invention Grant
- Patent Title: Semiconductor device including vertically integrated optical and electronic devices and comprising a superlattice
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Application No.: US16380111Application Date: 2019-04-10
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Publication No.: US10884185B2Publication Date: 2021-01-05
- Inventor: Robert John Stephenson
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATED
- Current Assignee: ATOMERA INCORPORATED
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L33/06
- IPC: H01L33/06 ; H01L23/522 ; H01L27/15 ; G02B6/12 ; H01L27/12 ; H01L29/15 ; G02B6/134 ; H01L33/00 ; H01L33/34 ; H01L33/58
Abstract:
A semiconductor device may include a substrate having waveguides thereon, and a superlattice overlying the substrate and waveguides. The superlattice may include stacked groups of layers, with each group of layers comprising a stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include an active device layer on the superlattice including at least one active semiconductor device.
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Information query
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