Invention Grant
- Patent Title: Communicating a message request transaction to a logical device
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Application No.: US16518629Application Date: 2019-07-22
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Publication No.: US10884971B2Publication Date: 2021-01-05
- Inventor: David Harriman , Jasmin Ajanovic
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: H04J1/16
- IPC: H04J1/16 ; G06F13/42 ; H04L29/06 ; G06F13/40 ; G06F11/07

Abstract:
A general input/output communication port implements a communication stack that includes a physical layer, a data link layer and a transaction layer. The transaction layer includes assembling a packet header for a message request transaction to one or more logical devices. The packet header includes a format field to indicate the length of the packet header and to further specify whether the packet header includes a data payload, a subset of a type field to indicate the packet header relates to the message request transaction and a message field. The message field includes a message to implement the message request transaction. The message includes at least one message that is selected from a group of messages. The group of messages to include a message to unlock a logical device, a message to reset a logical device, a message to indicate a correctable error condition, a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, a message to report a bad request packet, a message to indicate power management and a message to emulate an interrupt signal.
Information query