A memory device includes: a memory cell array having a plurality of memory cells, wherein each of the plurality of memory cells includes a first port; a first control circuit disposed on a first side of the memory cell array and arranged to electrically connect to the plurality of first ports; and a second control circuit disposed on a second side of the memory cell array and arranged to electrically connect to the plurality of first ports; wherein the second side is opposite to the first side of the memory cell array.