Invention Grant
- Patent Title: Wiring board and semiconductor package
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Application No.: US16373951Application Date: 2019-04-03
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Publication No.: US10886211B2Publication Date: 2021-01-05
- Inventor: Yasuyuki Yamaguchi
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano
- Agency: Rankin, Hill & Clark LLP
- Priority: JP2018-073456 20180405
- Main IPC: H01L23/49
- IPC: H01L23/49 ; H01L23/498

Abstract:
A wiring board includes: a Cu pad; an insulating layer covering the Cu pad and having an opening portion; a first metallic layer formed on the Cu pad in the opening portion; and a connecting terminal formed on the first metallic layer to extend from the opening portion to above an upper surface of the insulating layer. The connecting terminal includes: a seed layer formed on the first metallic layer; and a second metallic layer formed on the seed layer. A stacked body is formed of the first metallic layer and the connecting terminal and includes a constricted portion. The constricted portion is located in a certain position of the first metallic layer in a thickness direction of the first metallic layer, and a sectional area of the stacked body is the smallest at the constricted portion.
Public/Granted literature
- US20190311982A1 WIRING BOARD AND SEMICONDUCTOR PACKAGE Public/Granted day:2019-10-10
Information query
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