- Patent Title: Two-terminal vertical 1T-DRAM and method of fabricating the same
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Application No.: US16465392Application Date: 2017-11-30
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Publication No.: US10886274B2Publication Date: 2021-01-05
- Inventor: Jea Gun Park , Seung Hyun Song , Min Won Kim
- Applicant: Industry-University Cooperation Foundation Hanyang University
- Applicant Address: KR Seoul
- Assignee: Industry-University Cooperation Foundation Hanyang University
- Current Assignee: Industry-University Cooperation Foundation Hanyang University
- Current Assignee Address: KR Seoul
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2016-0162666 20161201
- International Application: PCT/KR2017/013926 WO 20171130
- International Announcement: WO2018/101770 WO 20180607
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L27/102 ; H01L29/87

Abstract:
The present invention discloses a two-terminal vertical 1T-DRAM and a method of fabricating the same. According to one embodiment of the present invention, the two-terminal vertical 1T-DRAM includes a cathode layer formed of a first-type high-concentration semiconductor layer; a base region including a second-type low-concentration semiconductor layer formed on the cathode layer and a first-type low-concentration semiconductor layer formed on the second-type low-concentration semiconductor layer; and an anode layer formed of a second-type high-concentration semiconductor layer on the first-type low-concentration semiconductor layer.
Public/Granted literature
- US20200027882A1 TWO-TERMINAL VERTICAL 1T-DRAM AND METHOD OF FABRICATING THE SAME Public/Granted day:2020-01-23
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