Invention Grant
- Patent Title: High voltage semiconductor device and method of fabrication
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Application No.: US16124444Application Date: 2018-09-07
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Publication No.: US10886399B2Publication Date: 2021-01-05
- Inventor: Philippe Renaud
- Applicant: NXP USA, Inc.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Agent Charlene Jacobsen
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/40 ; H01L29/08

Abstract:
A semiconductor device, such as a laterally diffused metal-oxide-semiconductor (LDMOS) transistor, includes a semiconductor substrate in which a source region and a drain region are disposed. The drain region has a drain finger terminating at a drain end. A gate structure is supported by the semiconductor substrate between the source region and the drain region, the gate structure extending laterally beyond the drain end. A drift region in the semiconductor substrate extends laterally from the drain region to at least the gate structure. The drift region is characterized by a first distance between a first sidewall of the drain finger and a second sidewall of the gate structure, and the gate structure is laterally tilted away from the drain region at the drain end of the drain finger to a second distance that is greater than the first distance.
Public/Granted literature
- US20200083370A1 HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION Public/Granted day:2020-03-12
Information query
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