Output buffer circuit
Abstract:
An output buffer circuit is disclosed to achieve a high slew rate without increasing current consumption. The output buffer circuit includes an input circuit configured to output a first signal and a second signal in response to an input signal, and a slew rate control circuit configured to connect one of the first signal and the second signal to an output terminal to control a slew rate of an output signal based on or in response to a potential difference between the input signal and the output signal.
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