- Patent Title: Integrated structures containing vertically-stacked memory cells
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Application No.: US16421262Application Date: 2019-05-23
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Publication No.: US10892268B2Publication Date: 2021-01-12
- Inventor: Haitao Liu , Chandra Mouli , Sergei Koveshnikov , Dimitrios Pavlopoulos , Guangyu Huang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L27/11556 ; H01L27/11582
Abstract:
Some embodiments include an integrated structure having a stack of alternating dielectric levels and conductive levels, and having vertically-stacked memory cells within the conductive levels. An opening extends through the stack. Channel material is within the opening and along the memory cells. At least some of the channel material contains germanium.
Public/Granted literature
- US20190312047A1 Integrated Structures Containing Vertically-Stacked Memory Cells Public/Granted day:2019-10-10
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