Invention Grant
- Patent Title: Semiconductor memory device having an array chip bonded to a circuit chip by a bonding metal
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Application No.: US16508577Application Date: 2019-07-11
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Publication No.: US10892270B2Publication Date: 2021-01-12
- Inventor: Yoshiaki Fukuzumi , Hideaki Aochi
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2014-186684 20140912
- Main IPC: H01L27/11573
- IPC: H01L27/11573 ; H01L27/11582 ; H01L25/18 ; H01L27/11568 ; H01L21/768 ; H01L21/18 ; H01L23/00

Abstract:
According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
Public/Granted literature
- US20190333927A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2019-10-31
Information query
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