Invention Grant
- Patent Title: Virtual inductors using ferroelectric capacitance and the fabrication method thereof
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Application No.: US16226747Application Date: 2018-12-20
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Publication No.: US10892728B2Publication Date: 2021-01-12
- Inventor: Koon Hoo Teo , Pin Chun Shen , Chungwei Lin
- Applicant: Mitsubishi Electric Research Laboratories, Inc.
- Applicant Address: US MA Cambridge
- Assignee: Mitsubishi Electric Research Laboratories, Inc.
- Current Assignee: Mitsubishi Electric Research Laboratories, Inc.
- Current Assignee Address: US MA Cambridge
- Agent Gennadiy Vinokur; James McAleenan; Hironori Tsukamoto
- Main IPC: H03H1/00
- IPC: H03H1/00 ; H03H3/00 ; H03H7/06 ; H03H1/02

Abstract:
Devices, system and methods a circuit, including a resistor, a normal capacitor and a ferroelectric capacitor connected in series. An input terminal to provide an input voltage across the circuit. An output terminal to deliver an output voltage taken across the normal capacitor. The circuit comprises a ferroelectric layer sandwiched between a first buffer layer and a second buffer layer. The first buffer layer contacts a portion of a first metal layer and first metal layer extends beyond the first buffer layer. A dielectric layer sandwiched between a second metal layer and a third metal layer. Such that the second metal layer extends beyond the dielectric layer and in contact with the second buffer layer. Wherein the ferroelectric capacitor is formed by the first metal layer. The ferroelectric layer sandwiched between the first buffer layer and the second buffer layer, and the second metal layer.
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