An information processing apparatus includes a processor configured to accept feature information on a specification of a target circuit to be designed. The processor is configured to refer to first correspondence information in which a plurality of parameter values are associated with respective index values for each piece of feature information on specifications of respective circuits to be configured in an integrated circuit. The processor is configured to calculate, for each of a plurality of combinations of parameter values related to the accepted feature information, a sum of the index values associated with respective parameter values included in the relevant combination of parameter values. The processor is configured to select one or more combinations of parameter values from among the plurality of combinations of parameter values on basis of the calculated sums. The processor is configured to output the selected combinations of parameter values.