Invention Grant
- Patent Title: Integrated circuit device including gate spacer structure
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Application No.: US16404996Application Date: 2019-05-07
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Publication No.: US10896967B2Publication Date: 2021-01-19
- Inventor: Chan-sic Yoon , Dong-oh Kim , Je-min Park , Ki-seok Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Lee IP Law, P.C.
- Priority: KR10-2018-0109727 20180913
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/66 ; H01L29/51

Abstract:
An integrated circuit device includes a gate stack structure on a base layer, the gate stack structure having a gate insulating layer with a first dielectric layer on the base layer and having first relative permittivity, and a gate structure on the gate insulating layer, and a gate spacer structure on opposite side walls of the gate stack structure and on the base layer, the gate spacer structure including a buried dielectric layer buried in a recess hole of the gate insulating layer at a lower portion of the gate spacer structure on the base layer, and the buried dielectric layer including a same material as the first dielectric layer.
Public/Granted literature
- US20200091305A1 INTEGRATED CIRCUIT DEVICE INCLUDING GATE SPACER STRUCTURE Public/Granted day:2020-03-19
Information query
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