Invention Grant
- Patent Title: Power source circuit with output voltage control and suppression of power consumption
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Application No.: US16543796Application Date: 2019-08-19
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Publication No.: US10897202B2Publication Date: 2021-01-19
- Inventor: Chen Kong Teh
- Applicant: Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
- Applicant Address: JP Tokyo; JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- Current Assignee: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- Current Assignee Address: JP Tokyo; JP Tokyo
- Agency: White & Case LLP
- Priority: JP2019-011098 20190125
- Main IPC: H02M3/158
- IPC: H02M3/158

Abstract:
According to an embodiment, a power source circuit includes a switching element that is connected between an input terminal and an output terminal, a driving circuit that supplies a PWM driving signal to the switching element, a first control path that integrates a differential voltage between an output voltage and a reference voltage to output a first control signal, a second control path that converts the differential voltage into a digital signal to output a second control signal, and a PWM signal generation circuit that generates a PWM signal dependent on the first and second control signals.
Public/Granted literature
- US20200244169A1 POWER SOURCE CIRCUIT Public/Granted day:2020-07-30
Information query
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