An image sensor may include an array of imaging pixels and readout circuitry. Testing circuitry may be interposed between the imaging pixels and the readout circuitry. The testing circuitry may include first and second test rows that provide first and second respective test voltages. In a testing mode, the first test voltage may be provided to approximately half of the readout circuitry and the second the second test voltage may be provided to the remaining half of the readout circuitry. In an imaging mode, the readout circuitry may be coupled to column output lines and read out signals from the array of imaging pixels. The components that receive different test voltages may be arranged in an alternating or checkerboard pattern to ensure testing of scenarios with coupling between adjacent components.