An array substrate may include a display area and a non-display area surrounding the display area. The display area may include at least one antistatic wiring; and a plurality of scan lines. The at least one antistatic wiring may be configured to conduct static electricity, and the at least one antistatic wiring and the plurality of scan lines may be interlaced and insulated. The at least one antistatic wiring may include a first wiring portion and a second wiring portion adjacent to each other. The first wiring portion and the second wiring portion may be located in different layers.