Invention Grant
- Patent Title: Circuit correction system and method for increasing coverage of scan test
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Application No.: US16702569Application Date: 2019-12-04
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Publication No.: US10909291B2Publication Date: 2021-02-02
- Inventor: Tse-Wei Wu , Yu-Hsun Su , Chen-Yuan Kao , Min-Hsiu Tsai
- Applicant: GLOBAL UNICHIP CORPORATION , TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu; TW Hsinchu
- Assignee: GLOBAL UNICHIP CORPORATION,TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: GLOBAL UNICHIP CORPORATION,TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu; TW Hsinchu
- Agency: CKC & Partners Co., LLC
- Priority: TW108119054A 20190531
- Main IPC: G06F30/333
- IPC: G06F30/333 ; G01R31/3177 ; G06F30/327 ; G06F30/392 ; G06F119/18

Abstract:
A method for increasing coverage of a scan test, executed by at least one processor, includes following operations: analyzing a first netlist file and a second netlist file to acquire a change of a circuit structure, in which the first netlist file corresponds to a first scan chain circuitry, and the second netlist file corresponds to a second scan circuitry wherein the second netlist file is generated by processing the first netlist file with executing an engineering change order (ECO); repairing the second scan chain circuitry according to at least one predetermined criterion; evaluating a candidate node of the repaired second scan chain circuitry, to connect a new flip flop circuit generated after executing the ECO to the candidate node; and storing the second netlist file being processed as a third netlist file, to fabricate an integrated circuit.
Public/Granted literature
- US20200380189A1 CIRCUIT CORRECTION SYSTEM AND METHOD FOR INCREASING COVERAGE OF SCAN TEST Public/Granted day:2020-12-03
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