Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US16475252Application Date: 2017-05-12
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Publication No.: US10910222B2Publication Date: 2021-02-02
- Inventor: Eiji Nakai , Harunaka Yamaguchi
- Applicant: Mitsubishi Electric Corporation
- Applicant Address: JP Tokyo
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Tokyo
- Agency: Studebaker & Brackett PC
- International Application: PCT/JP2017/018051 WO 20170512
- International Announcement: WO2018/207355 WO 20181115
- Main IPC: H01L21/223
- IPC: H01L21/223 ; H01L21/02 ; H01S5/30

Abstract:
An upper layer (4,5) made of non-doped III-V compound semiconductor is formed on a lower layer (3) made of non-doped III-V compound semiconductor. Impurity source gas is fed through vapor phase diffusion using an organometallic vapor-phase epitaxy device to add an impurity to the upper layer (4,5). The vapor phase diffusion is continued with the feed of the impurity source gas stopped or with a feed amount of the impurity source gas lowered.
Information query
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