Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16881484Application Date: 2020-05-22
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Publication No.: US10910394B2Publication Date: 2021-02-02
- Inventor: Tsutomu Okazaki , Akira Kato , Kan Yasui , Kyoya Nitta , Digh Hisamoto , Yasushi Ishii , Daisuke Okada , Toshihiro Tanaka , Toshikazu Matsui
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Roberts Calderon Safran & Cole, P.C.
- Agent Gregory E. Montone
- Priority: JP2004-231869 20040809
- Main IPC: H01L27/1157
- IPC: H01L27/1157 ; H01L27/105 ; H01L29/423 ; H01L21/28 ; G11C16/04 ; H01L27/02 ; H01L27/115 ; H01L27/11568 ; H01L29/66 ; H01L29/792 ; H01L29/06 ; H01L29/51

Abstract:
A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.
Information query
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