Invention Grant
- Patent Title: 3D printed semiconductor package
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Application No.: US16236106Application Date: 2018-12-28
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Publication No.: US10910465B2Publication Date: 2021-02-02
- Inventor: Benjamin Stassen Cook , Daniel Lee Revier
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Michael A. Davis, Jr.; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L49/02 ; H01L21/56 ; H01L23/66

Abstract:
In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.
Public/Granted literature
- US20200212166A1 3D PRINTED SEMICONDUCTOR PACKAGE Public/Granted day:2020-07-02
Information query
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