Invention Grant
- Patent Title: Semiconductor device having reduced capacitance between source and drain pads
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Application No.: US16550293Application Date: 2019-08-26
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Publication No.: US10910491B2Publication Date: 2021-02-02
- Inventor: Li-Fan Lin , Chun-Chieh Yang , Ying-Chen Liu
- Applicant: DELTA ELECTRONICS, INC.
- Applicant Address: TW Taoyuan
- Assignee: DELTA ELECTRONICS, INC.
- Current Assignee: DELTA ELECTRONICS, INC.
- Current Assignee Address: TW Taoyuan
- Agency: CKC & Partners Co., LLC
- Priority: TW102132512A 20130910,TW103106659A 20140227,TW103114340A 20140421
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/20 ; H01L29/417 ; H01L29/40 ; H01L23/535 ; H01L23/31 ; H01L23/528 ; H01L23/522 ; H01L29/423 ; H01L23/495 ; H01L23/00 ; H01L29/205
Abstract:
A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
Public/Granted literature
- US20190386128A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-12-19
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