Invention Grant
- Patent Title: Semiconductor package having thermal conductive pattern surrounding the semiconductor die
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Application No.: US16431747Application Date: 2019-06-05
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Publication No.: US10916488B2Publication Date: 2021-02-09
- Inventor: Jing-Cheng Lin , Szu-Wei Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/40
- IPC: H01L23/40 ; H01L23/433 ; H01L21/56 ; H01L23/00 ; H01L23/367 ; H01L25/10 ; H01L25/18 ; H01L23/31

Abstract:
Semiconductor packages are provided. One of the semiconductor package includes a semiconductor die, a thermal conductive pattern, an encapsulant and a thermal conductive layer. The thermal conductive pattern is disposed aside the semiconductor die. The encapsulant encapsulates the semiconductor die and the thermal conductive pattern. The thermal conductive layer covers a rear surface of the semiconductor die, wherein the thermal conductive pattern is thermally coupled to the semiconductor die through the thermal conductive layer and electrically insulated from the semiconductor die.
Public/Granted literature
- US20200006196A1 SEMICONDUCTOR PACKAGES Public/Granted day:2020-01-02
Information query
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