Memory cell structure
Abstract:
Provided is a method of forming a memory cell including a rectangular shaped via for at least one Vss node connection. In some embodiments, the rectangular shaped via has a length/width of greater than 1.5. The rectangular shaped via may be disposed on the Via0 and/or Via1 layer interfacing a first metal layer (e.g., M1). The memory cell may also include circular/square shaped vias having a length/width of between approximately 0.8 and 1.2. The circular/square shaped vias may be coplanar with the rectangular shaped vias.
Public/Granted literature
Information query
Patent Agency Ranking
0/0