Invention Grant
- Patent Title: Method of fabricating semiconductor device
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Application No.: US16374450Application Date: 2019-04-03
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Publication No.: US10916561B2Publication Date: 2021-02-09
- Inventor: Karthik Pillai , Soo Doo Chae , Sangcheol Han
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/00 ; H01L29/00 ; H01L27/11582 ; H01L27/1157 ; H01L21/02 ; H01L21/306 ; H01L21/3205 ; H01L21/3213 ; H01L21/311 ; H01L21/28

Abstract:
A method is provided for forming a semiconductor device. The method includes forming a vertical film stack containing a sacrificial layer on a substrate and dielectric layers alternatingly and repeatedly stacked on the sacrificial layer, removing the sacrificial layer to form a horizontal channel above the substrate, depositing a conformal dielectric layer in the horizontal channel, etching trenches in the vertical film stack that connect to the horizontal channel. The method further includes removing the conformal dielectric layer from the horizontal channel, filling the horizontal channel and the trenches with a first electrically conductive material, removing the first electrically conductive material from the trenches, and filling the trenches with a second electrically conductive material.
Public/Granted literature
- US20190304995A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Public/Granted day:2019-10-03
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