Invention Grant
- Patent Title: Nanosheet transistor with fully isolated source and drain regions and spacer pinch off
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Application No.: US16362030Application Date: 2019-03-22
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Publication No.: US10916627B2Publication Date: 2021-02-09
- Inventor: Nicolas Loubet , Pietro Montanini
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Douglas Pearson
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L21/8234 ; H01L29/66 ; H01L29/161 ; H01L21/033 ; H01L21/02 ; H01L27/088

Abstract:
A semiconductor device includes a plurality of nano sheet stacks disposed above a substrate. Each nanosheet stack has a first nanosheet and a first sacrificial layer, the first nanosheet and the first sacrificial layer each include a first end and a second end. The first end and the second end of the first sacrificial layer are recessed from the first and second ends of the first nanosheet. Each nanosheet stack has a bottom sacrificial layer formed on top of the substrate. The bottom sacrificial layer has a first end and a second end, which are recessed from the first and second ends of the first nanosheet. The semiconductor also has a source or drain (S/D) structures formed in contact with the first end and the second end of the first nanosheet. The S/D structures are isolated from the substrate by the bottom sacrificial layer.
Public/Granted literature
- US20200303500A1 NANOSHEET TRANSISTOR WITH FULLY ISOLATED SOURCE AND DRAIN REGIONS AND SPACER PINCH OFF Public/Granted day:2020-09-24
Information query
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