Invention Grant
- Patent Title: Trench-type insulated gate semiconductor device including an emitter trench and an overlapped floating region
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Application No.: US16050416Application Date: 2018-07-31
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Publication No.: US10923582B2Publication Date: 2021-02-16
- Inventor: Akihiro Hikasa
- Applicant: ROHM CO., LTD.
- Applicant Address: JP Kyoto
- Assignee: ROHM CO., LTD.
- Current Assignee: ROHM CO., LTD.
- Current Assignee Address: JP Kyoto
- Agent Gregory M. Howison
- Priority: JP2012-182169 20120821,JP2012-182170 20120821,JP2013-167478 20130812
- Main IPC: H01L29/739
- IPC: H01L29/739 ; H01L29/40 ; H01L29/417 ; H01L29/66 ; H01L29/06 ; H01L29/10

Abstract:
A semiconductor device is disclosed having a plurality of gate trenches formed on the surface thereof, each filled with a gate insulating film and a gate electrode. A transistor region is defined between adjacent gate trenches forming a pair, and includes an n+-type emitter region, a p-type base region, and an n−-type drift region disposed lateral to each gate trench in the pair, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer. A p+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n−-type drift region. A plurality of emitter trenches are formed one either side of each of the gate trenches in the pair of gate trenches.
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