Invention Grant
- Patent Title: Circuit arrangement with galvanic isolation between electronic circuits
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Application No.: US16786882Application Date: 2020-02-10
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Publication No.: US10924108B2Publication Date: 2021-02-16
- Inventor: Markus Muellauer , Thomas Ferianz , Hermann Gruber
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Harrity & Harrity, LLP
- Priority: DE102019103730.1 20190214
- Main IPC: H03K17/691
- IPC: H03K17/691 ; H03K17/567

Abstract:
A circuit arrangement is enclosed. The circuit arrangement includes a first electronic circuit; a second electronic circuit; and a coupling circuit connected between the first electronic circuit and the second electronic circuit. The first electronic circuit is at least partially integrated in a first region of a semiconductor layer, the second electronic circuit is at least partially integrated in a second region of the semiconductor layer, and the second region adjoins a first insulating layer formed on a first surface of the semiconductor layer and is electrically insulated from the first region by a second insulating layer. Further, the coupling circuit is arranged in a third insulating layer formed on a second surface of the semiconductor layer and comprises at least two capacitors connected in series.
Public/Granted literature
- US20200266817A1 CIRCUIT ARRANGEMENT WITH GALVANIC ISOLATION BETWEEN ELECTRONIC CIRCUITS Public/Granted day:2020-08-20
Information query
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