Invention Grant
- Patent Title: Semiconductor device with reduced power consumption and operation method thereof, electronic component, and electronic device
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Application No.: US16475906Application Date: 2018-01-09
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Publication No.: US10930323B2Publication Date: 2021-02-23
- Inventor: Takahiko Ishizu , Toshihiko Saito
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JPJP2017-001575 20170110
- International Application: PCT/IB2018/050115 WO 20180109
- International Announcement: WO2018/130929 WO 20180719
- Main IPC: G11C14/00
- IPC: G11C14/00 ; G11C5/14 ; G06F1/3234

Abstract:
Power consumption of a semiconductor device is reduced efficiently. The semiconductor device includes a power management unit, a cell array, and a peripheral circuit for driving the cell array. The cell array includes a word line, a bit line pair, a memory cell, and a backup circuit for backing up data in the memory cell. A row circuit and a column circuit are provided in a first power domain capable of power gating, and the cell array is provided in a second power domain capable of power gating. In the operation mode of a memory device, a plurality of low power consumption modes, which have lower power consumption than the standby mode, are set. The power management unit selects one from the plurality of low power consumption modes and performs control for bringing the memory device into the selected low power consumption mode.
Public/Granted literature
- US20190355397A1 SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE Public/Granted day:2019-11-21
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