Invention Grant
- Patent Title: Display device
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Application No.: US16413917Application Date: 2019-05-16
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Publication No.: US10930683B2Publication Date: 2021-02-23
- Inventor: Atsushi Umezaki , Hiroyuki Miyake
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Fish & Richardson P.C.
- Priority: JP2006-270016 20060929
- Main IPC: H01L27/12
- IPC: H01L27/12 ; G09G3/36 ; G11C19/28 ; G09G3/20 ; H01L27/02 ; G09G3/3266

Abstract:
To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
Public/Granted literature
- US20190280014A1 DISPLAY DEVICE Public/Granted day:2019-09-12
Information query
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