Invention Grant
- Patent Title: Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates
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Application No.: US16739265Application Date: 2020-01-10
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Publication No.: US10930756B2Publication Date: 2021-02-23
- Inventor: Zhenxing Bi , Kangguo Cheng , Nicolas J. Loubet , Xin Miao , Wenyu Xu , Chen Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Randall Bluestone
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/06

Abstract:
Embodiments of the invention are directed to method of fabricating a semiconductor device. A non-limiting embodiment of the method includes performing fabrication operations to form a nanosheet field effect transistor (FET) device on a substrate, wherein the fabrication operations include forming gate spacers along a gate region of the nanosheet FET device, wherein each of the gate spacers comprises an upper segment and a lower segment.
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