Invention Grant
- Patent Title: Pillar-shaped semiconductor device and method for producing the same
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Application No.: US16277670Application Date: 2019-02-15
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Publication No.: US10930761B2Publication Date: 2021-02-23
- Inventor: Fujio Masuoka , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Brinks Gilson & Lione
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L29/786 ; H01L21/28 ; H01L21/308 ; H01L21/84 ; H01L27/12 ; H01L29/06 ; H01L21/02 ; H01L21/225 ; H01L21/285 ; H01L21/3065 ; H01L21/762

Abstract:
A Si substrate is etched through a first mask material layer formed on the Si substrate and serving as a mask, to form a Si pillar on a Si substrate. Subsequently, a second mask material layer formed so as to surround the side surface of the Si pillar is used as a mask to form a Si-pillar base part surrounding the Si pillar. Subsequently, the first and second mask material layers are used as masks to form a SiO2 layer so as to occupy the whole section of the Si-pillar base part and connect to the Si substrate positioned in a region around the Si-pillar base part. Recessed portions are formed in the upper and lower regions of the SiO2 layer. Subsequently, on the SiO2 layer, an SGT is formed so as to include a gate insulating HfO2 layer surrounding the Si pillar, a gate conductor TiN layer, N+ layers serving as the source or drain within the Si pillar, and a Si pillar serving as the channel between the N+ layers.
Public/Granted literature
- US20190181244A1 PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME Public/Granted day:2019-06-13
Information query
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