Invention Grant
- Patent Title: Method for forming a semiconductor device including a stacked wire structure
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Application No.: US16512016Application Date: 2019-07-15
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Publication No.: US10930782B2Publication Date: 2021-02-23
- Inventor: Cheng-Hsien Wu , Chih-Chieh Yeh , Yee-Chia Yeo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/8238 ; H01L29/423 ; H01L29/66 ; H01L29/786 ; H01L29/10 ; H01L21/768 ; H01L29/04
Abstract:
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a stacked wire structure formed over the substrate. The semiconductor device structure also includes a gate structure formed over a middle portion of the stacked wire structure and a source/drain (S/D) structure formed at two opposite sides of the stacked wire structure. The S/D structure includes a top surface, a sidewall surface, and a rounded corner between the top surface and the sidewall surface.
Public/Granted literature
- US20190341482A1 Method for Forming a Semiconductor Device Including a Stacked Wire Structure Public/Granted day:2019-11-07
Information query
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