Invention Grant
- Patent Title: Reconfigurable memory architectures
-
Application No.: US15981708Application Date: 2018-05-16
-
Publication No.: US10936221B2Publication Date: 2021-03-02
- Inventor: Brent Keeth , James Brian Johnson
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G06F3/06 ; H01L23/538 ; H01L25/18 ; G11C11/4076 ; G11C11/4093 ; G11C11/4096 ; G11C11/22 ; G06F11/10 ; H01L25/065 ; H01L23/50 ; G11C5/02 ; G11C11/00 ; H01L23/14 ; G11C11/4097

Abstract:
Techniques are described herein for a reconfigurable memory device that is configurable based on the type of interposer used to couple the memory device with a host device. The reconfigurable memory device may include a plurality components for a plurality of configurations. Various components of the reconfigurable memory die may be activated/deactivated based on what type of interposer is used in the memory device. For example, if a first type of interposer is used (e.g., a high-density interposer), the data channel may be eight data pins wide. In contrast, if second type of interposer is used (e.g., an organic-based interposer), the data channel may be four data pins wide. As such, a reconfigurable memory device may include data pins and related drivers that are inactive in some configurations.
Public/Granted literature
- US20190121560A1 RECONFIGURABLE MEMORY ARCHITECTURES Public/Granted day:2019-04-25
Information query