Invention Grant
- Patent Title: Anomaly detection with reduced memory overhead
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Application No.: US16281888Application Date: 2019-02-21
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Publication No.: US10937465B2Publication Date: 2021-03-02
- Inventor: Holger M. Jaenisch , James W. Handley
- Applicant: Raytheon Company
- Applicant Address: US MA Waltham
- Assignee: Raytheon Company
- Current Assignee: Raytheon Company
- Current Assignee Address: US MA Waltham
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F11/10 ; G11C5/02

Abstract:
A method can include identifying, by processing circuitry of a device, a row of rows and/or column of columns to which a first feature and a second feature of an input maps, comparing the identified row and/or column to a row run length encoding (RLE) in a memory of the device that indicates, for each row, whether one or more cells in the row include an input mapped thereto or a column RLE in a memory of the device that indicates, for each column, whether one or more cells in the column include an input mapped thereto, respectively, and determining the input data is anomalous in response to determining either the row RLE indicates that no inputs are mapped to the row to which the input maps, or the column RLE indicates that no inputs are mapped to the column to which the input maps.
Public/Granted literature
- US20200273499A1 ANOMALY DETECTION WITH REDUCED MEMORY OVERHEAD Public/Granted day:2020-08-27
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