- Patent Title: Semiconductor memory device in which a conductive line connected to a word line selected for programming is charged to a voltage larger than the program voltage
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Application No.: US16546112Application Date: 2019-08-20
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Publication No.: US10937502B2Publication Date: 2021-03-02
- Inventor: Toshifumi Hashimoto
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JPJP2019-041070 20190307
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/10 ; G11C16/32 ; H01L27/11526 ; G11C16/30 ; G11C16/04 ; H01L27/11573 ; G11C16/34 ; H01L27/11582 ; H01L27/11556

Abstract:
A semiconductor memory device includes a first memory transistor, a first wiring connected to a gate electrode of the first memory transistor, a connection transistor connected to the first wiring, and a second wiring connected to the connection transistor. In a first write operation for the first memory transistor, during a first time period, a voltage of the first wiring increases to a first voltage and a voltage of the second wiring increases to a second voltage larger than the first voltage, and during a second time period directly after the first time period and directly after the connection transistor is turned ON, the voltage of the first wiring increases to a third voltage larger than the first voltage and smaller than the second voltage, and the voltage of the second wiring decreases to a fourth voltage larger than the first voltage and smaller than the second voltage.
Public/Granted literature
- US20200286563A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2020-09-10
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