Invention Grant
- Patent Title: Three-dimensional memory device containing a polygonal lattice of support pillar structures and contact via structures and methods of manufacturing the same
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Application No.: US16361773Application Date: 2019-03-22
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Publication No.: US10937801B2Publication Date: 2021-03-02
- Inventor: Yoshitaka Otsu , Koichiro Nagata , Junpei Kanazawa
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11565 ; H01L27/1157 ; H01L27/11573 ; H01L27/11519 ; H01L27/11524 ; H01L27/11529 ; H01L27/11556

Abstract:
A vertically alternating sequence of continuous insulating layers and continuous sacrificial material layers is formed over a substrate, and is patterned to form stepped surfaces. Memory stack structures are formed in a memory array region of the alternating stack. Support pillar structures are formed through the vertically alternating sequence within a staircase region. The support pillar structures are formed at lattice sites of a hexagonal lattice structure that includes unoccupied lattice sites. Portions of the continuous sacrificial material layers are replaced with electrically conductive layers. Contact via structures are formed on a respective one of the electrically conductive layers at the unoccupied lattice sites. Geometrical centers of the support pillar structures are arranged at vertices of a polygon having more than four vertices having a respective contact via structure located at a geometric center of the polygon in a plan view.
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