Invention Grant
- Patent Title: Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices
-
Application No.: US16513832Application Date: 2019-07-17
-
Publication No.: US10937868B2Publication Date: 2021-03-02
- Inventor: Richard Burton , Marek Hytha , Robert J. Mears
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATED
- Current Assignee: ATOMERA INCORPORATED
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L29/16
- IPC: H01L29/16 ; H01L29/15 ; H01L29/80 ; H01L29/66 ; H01L29/93 ; H01L29/78

Abstract:
A method for making a semiconductor device may include forming a hyper-abrupt junction region above a substrate and including a first semiconductor layer having a first conductivity type, a first superlattice layer on the first semiconductor layer, a second semiconductor layer on the first superlattice layer and having a second conductivity type different than the first conductivity type, and a second superlattice layer on the second semiconductor layer. The method may further include forming a gate dielectric layer on the second superlattice layer of the hyper-abrupt junction region, forming a gate electrode on the gate dielectric layer, and forming spaced apart source and drain regions adjacent the hyper-abrupt junction region.
Public/Granted literature
Information query
IPC分类: