Invention Grant
- Patent Title: Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices
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Application No.: US16513875Application Date: 2019-07-17
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Publication No.: US10937888B2Publication Date: 2021-03-02
- Inventor: Richard Burton , Marek Hytha , Robert J. Mears
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATED
- Current Assignee: ATOMERA INCORPORATED
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/93 ; H01L29/94

Abstract:
A method for making a semiconductor device may include forming a hyper-abrupt junction region above a substrate and including a first semiconductor layer having a first conductivity type, a first superlattice layer on the first semiconductor layer, a second semiconductor layer on the first superlattice layer and having a second conductivity type different than the first conductivity type, and a second superlattice layer on the second semiconductor layer. The method may further include forming a first contact coupled to the hyper-abrupt junction region and a second contact coupled to the substrate to define a varactor. The first and second superlattices may each include stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
Public/Granted literature
- US20210020759A1 METHOD FOR MAKING A VARACTOR WITH A HYPER-ABRUPT JUNCTION REGION INCLUDING SPACED-APART SUPERLATTICES Public/Granted day:2021-01-21
Information query
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